Phison E13T

The Phison PS5013-E13T (E13T) is an entry-level, DRAM-less PCIe 3.0 x4 controller built on TSMC's 28nm process. It uses a single-CPU architecture with a built-in 32-bit microcontroller. The flash interface supports up to 4 channels with 16 chip-enables and a transfer rate of up to 800 MT/s, supporting both 3D TLC and QLC NAND. In place of a dedicated DRAM cache, the E13T relies on Host Memory Buffer (HMB), borrowing a portion of system DRAM for the flash translation layer.

Error correction uses Phison's fourth-generation LDPC engine with RAID ECC. The controller also supports static and dynamic SLC caching, end-to-end data path protection, and Phison's SmartZIP inline compression. On the security side it covers AES-256, TCG Opal, and Pyrite. Peak rated performance reaches 2,500 MB/s sequential read and 2,100 MB/s sequential write at 512GB and above; smaller capacities are noticeably lower due to reduced parallelism.