Phison PS3110-S10

The Phison PS3110-S10 is a quad-core SATA III controller introduced in 2014, designed for use with both MLC and TLC NAND flash. Built on a 55nm CMOS process, it features 8 flash channels with support for up to 32 chip-enables and 4-plane flash access. DRAM cache is configurable at 2Gb, 4Gb, or 8Gb of DDR3. On the error correction side, the PS3110 includes a hardware 120-bit/2KB BCH ECC engine and end-to-end data path protection.

At introduction the controller reached 540–560 MB/s sequential read and 530–545 MB/s sequential write with MLC NAND, in line with the mainstream SATA tier of its time. Random performance reaches up to 100,000 IOPS at high queue depth. The quad-core design was unusual at the time (Samsung's contemporary MEX controller used three cores) and was partly motivated by the ECC demands of TLC NAND, which requires more computational headroom to deliver adequate write endurance.